I am a third year Ph.D. student in the Computer Science Department of University of Virginia (UVA), working with Prof. Ashish Venkat on Computer Architecture.
My research interests lie broadly in Computer Architecture, Compilers, and Computer Security. My research explores novel hardware and software techniques to design secure machines while maintaining performance, energy efficiency, and high programmability. I’m also interested in applying novel machine learning techniques to detect and mitigate security threats. I have extensive experience in designing high performance, energy efficient FPGA and embedded systems for core consumer products. You can find my CV here.
Recent highlights include:
Hardware Security: High performance and transparent capability based protection mechanism to secure unmodified source and object code against temporal and spatial memory safety exploits
Processing in Memory: DRAM-based in-situ k-mer matching accelerator design for simultaneous comparisons of millions of DNA base pairs
Speculation-Driven Dynamic Binary Optimization: Exploring dynamic binary optimization techniques at the processor level to speculatively generate and execute a super-optimized instruction stream
|Mar. 2021||I'm actively looking for research internship in industry starting from Summer 2021.|
|Mar. 2021||Our paper, "Sieve: Scalable In-situ DRAM-based Accelerator Designs for Massively Parallel k-mer Matching" has been accepted in International Symposium on Computer Architecture (ISCA). (June 14 – June 19, 2021)|
|June. 2020||I'll be presenting our paper CHEx86 on June 2nd at ISCA 2020.|
|Implementation of a Super-Optimizer in GEM5 Microarchtecture Simulator|
|ISCA||Lingxi Wu, Rasool Sharifi, Marzieh Lenjani, Kevin Sakdron, Ashish Venkat"Sieve: Scalable In-situ DRAM-based Accelerator Designs for Massively Parallel k-mer Matching," in Proceedings of the 48th ACM/IEEE International Symposium on Computer Architecture (ISCA), June, 2021.|
|ISCA||Rasool Sharifi and Ashish Venkat,"CHEx86: Context-Sensitive Enforcement of Memory Safety via Microcode-Enabled Capabilities," in Proceedings of the 47th ACM/IEEE International Symposium on Computer Architecture (ISCA), June, 2020.|
|ETS||Rasool Sharifi and Zain Navabi, "Online Profiling for Cluster-Specific Variable Rate Refreshing in High-Density DRAM Systems," in IEEE European Test Symposium (ETS), May, 2017.|