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Quiz on fourth week's material.

The following ask about timing of circuit components. The options are

now, meaning after the delay inherent in transistors changing state but not other waiting
next cycle, meaning after the next rising edge of the clock
never, meaning the action described is insufficient to cause the listed change
none of the above, meaning either (a) a different kind of timing or (b) the answer varies depending on some information we did not supply

Question 1: (see above) You change the input of a register such as the PC or a condition code. The output changes

now
next cycle
never
none of the above

Question 2: (see above) You provide a new register value to the register file. The value in that register changes

now
next cycle
never
none of the above

Question 3: (see above) You request access to a new register value from the register file. The value becomes available to you

now
next cycle
never
none of the above

Question 4: (see above) You read an address from memory. The value read becomes available to you

now
next cycle
never
none of the above

Question 5: (see above) You write a value to an address in memory. The value written enters memory

now
next cycle
never
none of the above

The following ask about mux inputs in order to implement various instructions. Each one assumes that some given signal has a mux in front of it and asks what set of inputs that mux would need. Your answer should consider only data inputs, not selector wires and should be consistent with the presentation in the textbook.

Question 6: (see above) Consider the data-memory touching instructions (pushq, popq, rmmovq, mrmovq, call, and ret). What inputs are needed for the address to for data memory?
Select all that apply

the output of the ALU or the register file
a constant value (such as 1 or 8)
the current instruction's address (i.e., the PC)
the subsequent instruction's address (i.e., valP)
a part of the instruction encoding (such as rA, ifun, or valC)
one or more values not listed above

Question 7: (see above) Consider the data-memory writing instructions (pushq, rmmovq, and call). What inputs are needed for the value written into data memory?
Select all that apply

the output of the ALU or the register file
a constant value (such as 1 or 8)
the current instruction's address (i.e., the PC)
the subsequent instruction's address (i.e., valP)
a part of the instruction encoding (such as rA, ifun, or valC)
one or more values not listed above

Question 8: (see above) Consider the unconditional move instructions (irmovq, rrmovq, rmmovq, and mrmovq). What inputs are needed for the register destinations dstE and dstM?
Select all that apply

the output of the ALU or the register file
a constant value (such as 1 or 8)
the current instruction's address (i.e., the PC)
the subsequent instruction's address (i.e., valP)
a part of the instruction encoding (such as rA, ifun, or valC)
one or more values not listed above

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