The circuit inputs (ascii text) and routing solutions produced by our FPGA router:

X3000-Type FPGA

• BUSC, W = 7
  Circuit Input, Routing Solution (text, graphical)
• DMA, W = 9
  Circuit Input, Routing Solution (text, graphical)
• BNRE, W = 9
  Circuit Input, Routing Solution (text, graphical)
• DFSM, W = 9
  Circuit Input, Routing Solution (text, graphical)
• Z03, W = 11
  Circuit Input, Routing Solution (text, graphical)

X4000-Type FPGA

• ALU4, W = 11
  Circuit Input, Routing Solution (text, graphical)
• APEX7, W = 10
  Circuit Input, Routing Solution (text, graphical)
• TERM1, W = 8
  Circuit Input, Routing Solution (text, graphical)
• EXAMPLE2, W = 11
  Circuit Input, Routing Solution (text, graphical)
• TOO_LARGE, W = 10
  Circuit Input, Routing Solution (text, graphical)
• K2, W = 15
  Circuit Input, Routing Solution (text, graphical)
• VDA, W = 12
  Circuit Input, Routing Solution (text, graphical)
• 9SYMML, W = 8
  Circuit Input, Routing Solution (text, graphical)
• ALU2, W = 9
  Circuit Input, Routing Solution (text, graphical)