This page is for a prior offering of CS 3330. It is not up-to-date.
HW/Lab 1: bomblab
Lab 2: memory safety
HW/Lab 3: code lab 1
bit-fiddling lab
bit-fiddling HW
HCL lab 1: SEQ
HCL HW 1 (irmovq)
HCL lab 2: SEQ2
HCL HW 2 (SEQ)
HCL lab 3: PIPE1
HCL HW 3 (halfpipe)
HCL lab 4: PIPE2
HCL HW 4 (fullpipe)
Loop Optimizations lab
Perf: rotate/smooth
SIMD lab
Memory HW
HCLRS, our hardware description language.
A work-in-progress textbook replacement. This text has not been proofread and may contain errors and/or falsehoods.
HCL2D, our previous hardware description language.
pipeline debugging video tutorial