The goal of this course is to introduce students to the hardware/software interface and the fundamental building blocks that make up a modern computer. By taking this course, students will:

• become conversant with fundamental computer architecture concepts,
• be able to read and evaluate specs of modern architectures,
• understand the implications of computer architecture on performance and security, and
• gain experience designing a working processor from scratch.

Required Textbook:

Patterson and Hennessy, "Computer Organization and Design: The Hardware/Software Interface", Fifth Edition

Other textbooks and online resources:

• Graduate textbook:Hennessy and Patterson, "Computer Architecture: A Quantitative Approach", Sixth Edition
• Books from Synthesis Lectures on Computer Architecture

Contact

We will use Piazza as our class forum, and our primary mode of communication outside of class. All general inquiries must be made on Piazza. For group-specific questions or private questions, you can either email me or post a private question on Piazza.

Zoom meeting links for lecture, office hours, and discussions are posted here.

Zoom recordings for lectures and discussions are posted here.

Instructor:

Ashish Venkat (email: venkat@virginia.edu)
Office Hours: Mo/We 1pm-2pm or by appointment.

Teaching Assistants:

Rasool Sharifi (email: as3mx@virginia.edu)
Office Hours: Tu 10am-11am

Xida Ren (email: xr5ry@virginia.edu)
Office Hours: Fr 6:15pm-7:15pm

Layne Berry (email: vlb9ae@virginia.edu)
Office Hours: Fr 10am-11am

Joey Rudek (email: jer5ae@virginia.edu)
Office Hours: Fr 3pm-4pm

Jerome Romualdez (email: jhr3kd@virginia.edu)
Office Hours: Mo 11am-12pm

Alif Ahmed (email: aa8qz@virginia.edu)
Office Hours: Mo 10am-11am

Farzana Siddique (email: farzana@virginia.edu)
Office Hours: Tu 11am-12pm

Trey West (email: rew7y@virginia.edu)
Office Hours: Th 3pm-4pm

Vanamala Venkataswamy (email: vv3xu@virginia.edu)
Office Hours: Th 2pm-3pm

Grading

The grading breakdown for this course is:

• 5%: Peer Review and Professionalism
• 20%: 5 homework assignments
• 15%: Lab Project-1 (Feb 24 to Apr 19)
• 10%: Lab Project-2 (Apr 28 to May 12)
• 10%: Midterm exam-1 on Mar 8 (will include material from Feb 3 to Feb 24)
• 15%: Midterm exam-2 on Apr 14 (will include material from Mar 10 to Apr 5)
• 25%: Final exam on May 10 from 2pm-5pm (inclusive of all material)

We will NOT use an absolute grading scale for this course. Your final letter grades will be assigned based on your overall performance, relative to the class average. In addition, you will receive an automatic level-up in your letter grade (e.g., A- to A) if you ace the final. Scores and standings will be periodically updated on Gradesource.

Assignments

There will be 5 homework assignments (due roughly every two weeks). Each homework assignment will involve 5-6 exercise problems from the textbook. Links to assignments:

• HW1 -- Quantitative Analysis and Instruction Set Architecture [Solutions]
• HW2 -- Digital Logic and Single-Cycle Processors [Solutions]
• HW3 -- Pipelined Datapath and Control [Solutions]
• HW4 -- Branch Prediction and OOO Processors [Solutions]
• HW5 -- Cache Organization and Management [Solutions]

There will also be 2 lab projects that will involve building a processor and a cache side-channel exploit from scratch. More details to follow soon.

• Project-1 -- Processor Design
• Project-2 -- Cache Attacks

Guidelines and Policies:

• You will work in groups of three students for all assignments (including the lab projects) and all students will receive the same grade. In addition, each individual member will be given a chance to evaluate other members of the group for every assignment/project.
• Homework assignments are to be turned in electronically on Gradescope, at the beginning of the lecture, unless otherwise noted.
• You are strongly encouraged to typeset your homework solutions, but not strictly required.
• Homework assignments are primarily intended for practice, rather than assessment. No single problem will have a significant impact on your final grade.
• Solutions to homework assignments will be typically released 2 days after the assignment is due.
• Late assignments are not encouraged. Late assignments turned in before solutions are posted will be assessed a flat 10% (of the maximum score) late penalty. If you turn in the assignment after the solutions have been posted, it will not be accepted.

Schedule

Date	Topic	Assignment	Lab/Discussion
Feb 1	Introduction, Motivation, and Course Logistics Background Preparation: Appendix A Reading: Chapter 1.3	-	-
Feb 3	Instruction Set Architecture Reading: Chapters 2.2, 2.3, 2.5	HW1 out	Discussion: ISA
Feb 8	Memory Organization and Control Flow Reading: Chapters 2.6, 2.7, 2.8	-	-
Feb 10	Quantitative Analysis in Computer Architecture Reading: Chapters 1.6 and 1.10	-	Discussion: Quantitative Analysis + Digital Logic
Feb 15	Design of the MIPS Arithmetic and Logic Unit Reading: Appendix B.2, B.3, and B.5	HW1 due, HW2 out	-
Feb 17	Break	-	-
Feb 22	Design of the Control Unit and Register File Reading: Appendix B.7, B.8, and Chapter 4.3	-	-
Feb 24	The MIPS Single Cycle Processor Architecture Reading: Chapters 4.3 and 4.4	Project-1 out	Discussion: Single Cycle Processor Lab: Introduction to Project-1
Mar 1	Single Cycle Processor Review Reading: Chapter 4.4	HW2 due	-
Mar 3	Midterm Exam-1 Review	-	Discussion: TA Midterm Review
Mar 8	Midterm Exam-1	-	-
Mar 10	Pipelined Datapath and Control Reading: Chapters 4.5 and 4.6	HW3 out	Discussion: Pipelining
Mar 15	Pipelining: Data Hazards Reading: Chapter 4.7	-	-
Mar 17	Pipelining: Forwarding Reading: Chapter 4.7	-	Discussion: Pipeline Diagrams
Mar 22	Pipelining: Control Hazards Reading: Chapter 4.8	-	-
Mar 24	Branch Prediction Reading: Chapters 4.8 and 4.10	HW3 due, HW4 out	Discussion: Branch Prediction
Mar 29	Break	-	-
Mar 31	Superscalar Execution Reading: Chapter 4.10	-	Discussion: Midterm-2 TA Review-1
Apr 5	Static and Dynamic Scheduling Reading: Chapters 4.10 and 4.11	-	-
Apr 7	Evolution of the Modern Microprocessor Reading: Chapter 4.11	HW4 due	Discussion: Midterm-2 TA Review-2
Apr 12	Midterm Exam-2 Review	-	-
Apr 14	Midterm Exam-2	-	Discussion: Midterm Solutions
Apr 19	Introduction to Memory Hierarchy: Cache Fundamentals Reading: Appendix B.9 and Chapter 5.3	Project-1 due	-
Apr 21	Cache Organization and Design Reading: Chapter 5.4	HW5 out	Discussion: Cache Organization
Apr 26	Cache Management and Policies Reading: Chapter 5.8	-	-
Apr 28	Cache Side Channel Attacks-1 Reading: Chapters 8.1-8.5 from Principles of Secure Processor Architecture Design	Project-2 out (due May 12)	Discussion: Cache Side Channel Attacks Lab: Introduction to Project-2
May 3	Cache Side Channel Attacks-2 Reading: Chapters 8.1-8.5 from Principles of Secure Processor Architecture Design	-	-
May 5	Final Review	HW5 due	Discussion: TA Final Review

Honor Code

I trust every student in this course to fully abide by the University's Honor Code and pledge to not commit academic fraud. You are allowed to discuss, collaborate, and brainstorm both within and outside your group. However, you're not allowed to plagiarize solutions/text from another student's assignment or from the internet. Cheating will be taken seriously and will be reported to the honor committee. All suspected honor violations will receive an failing grade for the course regardless of any action taken by the Honor Committee.

Please let me know if you have any questions regarding the course Honor policy. If you believe you may have committed an Honor Offense, you may wish to file a Conscientious Retraction by calling the Honor Offices at (434) 924-7602. For your retraction to be considered valid, it must, among other things, be filed with the Honor Committee before you are aware that the act in question has come under suspicion by anyone. More information can be found here. Your Honor representatives can be found at this link

Learning Accommodations

Students with disabilities or learning needs
It is my goal to create a learning experience that is as accessible as possible. If you anticipate any issues related to the format, materials, or requirements of this course, please meet with me outside of class so we can explore potential options. Students with disabilities may also wish to work with the Student Disability Access Center to discuss a range of options to removing barriers in this course, including official accommodations. Please visit their website for information on this process and to apply for services online. If you have already been approved for accommodations through SDAC, please send me your accommodation letter and meet with me so we can develop an implementation plan together.

Discrimination and power-based violence
The University of Virginia is dedicated to providing a safe and equitable learning environment for all students. To that end, it is vital that you know two values that I and the University hold as critically important:

1. Power-based personal violence will not be tolerated.
2. Everyone has a responsibility to do their part to maintain a safe community on Grounds.

If you or someone you know has been affected by power-based personal violence, more information can be found on the UVA Sexual Violence website that describes reporting options and resources available.

As your professor and as a person, know that I care about you and your well-being and stand ready to provide support and resources as I can. As a faculty member, I am a responsible employee, which means that I am required by University policy and federal law to report what you tell me to the University's Title IX Coordinator. The Title IX Coordinator's job is to ensure that the reporting student receives the resources and support that they need, while also reviewing the information presented to determine whether further action is necessary to ensure survivor safety and the safety of the University community. If you wish to report something that you have seen, you can do so at the Just Report It portal. The worst possible situation would be for you or your friend to remain silent when there are so many here willing and able to help.

Religious accommodations
It is the University's long-standing policy and practice to reasonably accommodate students so that they do not experience an adverse academic consequence when sincerely held religious beliefs or observances conflict with academic requirements. Students who wish to request academic accommodation for a religious observance should submit their request in writing directly to me as far in advance as possible. Students who have questions or concerns about academic accommodations for religious observance or religious beliefs may contact the University’s Office for Equal Opportunity and Civil Rights (EOCR) at UVAEOCR@virginia.edu or (434) 924-3200.